发明授权
- 专利标题: Techniques for grouping circuit elements into logic blocks
- 专利标题(中): 将电路元件分组成逻辑块的技术
-
申请号: US10716309申请日: 2003-11-17
-
公开(公告)号: US07275228B1公开(公告)日: 2007-09-25
- 发明人: Ketan Padalia , Kimberly Bozman , Vaughn Betz
- 申请人: Ketan Padalia , Kimberly Bozman , Vaughn Betz
- 申请人地址: US CA San Jose
- 专利权人: Altera Corporation
- 当前专利权人: Altera Corporation
- 当前专利权人地址: US CA San Jose
- 代理机构: Townsend and Townsend and Crew LLP
- 主分类号: G06F9/45
- IPC分类号: G06F9/45 ; G06F17/50
摘要:
Techniques are provided for grouping circuits in a user design for a programmable integrated circuit into logic blocks. A packing tool separates each circuit element into individual abstract blocks and groups the abstract block into logic blocks. A determination is made whether placement information indicates that a design goal would be improved by rearranging at least a portion of the user design. The user design can be rearranged by moving one or more of the abstract blocks into different logic blocks than the ones they were previously grouped with. Circuit elements in the same logic block can be separated and placed into different logic blocks to improve routability of the user design and signal timing.
信息查询