Invention Grant
- Patent Title: Memory module decoder
- Patent Title (中): 内存模块解码器
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Application No.: US11173175Application Date: 2005-07-01
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Publication No.: US07289386B2Publication Date: 2007-10-30
- Inventor: Jayesh R. Bhakta , Jeffrey C. Solomon
- Applicant: Jayesh R. Bhakta , Jeffrey C. Solomon
- Applicant Address: US CA Irvine
- Assignee: Netlist, Inc.
- Current Assignee: Netlist, Inc.
- Current Assignee Address: US CA Irvine
- Agency: Knobbe Martens Olson & Bear LLP
- Main IPC: G11C8/00
- IPC: G11C8/00

Abstract:
A memory module connectable to a computer system includes a printed circuit board, a plurality of memory devices coupled to the printed circuit board, and a logic element coupled to the printed circuit board. The plurality of memory devices has a first number of memory devices. The logic element receives a set of input control signals from the computer system. The set of input control signals corresponds to a second number of memory devices smaller than the first number of memory devices. The logic element generates a set of output control signals in response to the set of input control signals. The set of output control signals corresponds to the first number of memory devices.
Public/Granted literature
- US20060062047A1 Memory module decoder Public/Granted day:2006-03-23
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