发明授权
US07291559B2 Etching method, gate etching method, and method of manufacturing semiconductor devices
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蚀刻方法,栅极蚀刻方法以及半导体器件的制造方法
- 专利标题: Etching method, gate etching method, and method of manufacturing semiconductor devices
- 专利标题(中): 蚀刻方法,栅极蚀刻方法以及半导体器件的制造方法
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申请号: US11011947申请日: 2004-12-15
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公开(公告)号: US07291559B2公开(公告)日: 2007-11-06
- 发明人: Akira Takahashi
- 申请人: Akira Takahashi
- 申请人地址: JP Tokyo
- 专利权人: Oki Electric Industry Co., Ltd.
- 当前专利权人: Oki Electric Industry Co., Ltd.
- 当前专利权人地址: JP Tokyo
- 代理机构: Volentine & Whitt, P.L.L.C.
- 优先权: JP2002-282155 20020927
- 主分类号: H01L21/302
- IPC分类号: H01L21/302
摘要:
In a method of manufacturing a semiconductor device, a dummy sample and an actual device are prepared. The dummy sample and the actual device have substantially an identical layer and an identical resist pattern formed on the layer. Then, a dummy discharge is carried out. The layer and the resist pattern of the dummy sample are etched in an etching device so that the layer and the resist pattern of the dummy device are simultaneously slimmed. Finally, the layer and the resist pattern of the actual device are etched in the etching device after the etching of the dummy sample so that the layer and the resist pattern of the actual device are simultaneously slimmed.
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