Invention Grant
US07310058B2 Reducing the time to convert an analog input sample to a digital code in an analog to digital converter (ADC)
有权
减少将模拟输入采样转换为模拟数字转换器（ADC）中数字码的时间，
- Patent Title: Reducing the time to convert an analog input sample to a digital code in an analog to digital converter (ADC)
- Patent Title (中): 减少将模拟输入采样转换为模拟数字转换器（ADC）中数字码的时间，
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Application No.: US11160859Application Date: 2005-07-13
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Publication No.: US07310058B2Publication Date: 2007-12-18
- Inventor: Anand Hariraj Udupa , Vikas Kumar Sinha , Nitin Agarwal , Visvesvaraya A. Pentakota , Sandeep Oswal
- Applicant: Anand Hariraj Udupa , Vikas Kumar Sinha , Nitin Agarwal , Visvesvaraya A. Pentakota , Sandeep Oswal
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments (India) Private Limited Texas Instruments Incorporated
- Current Assignee: Texas Instruments (India) Private Limited Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H03M1/38
- IPC: H03M1/38
Abstract:
A stage of a pipeline ADC which uses separate pairs of sampling network and amplifier (in a sample and hold circuit (SHA)) to provide inputs to quantizer (which generates a sub-code) and a switched capacitor network (implementing a DAC, a subtractor and amplification). Due to the use of separate components/paths to provide the input signal, the throughput performance of the ADC is enhanced.
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