Invention Grant
- Patent Title: Integrating n-type and p-type metal gate transistors
- Patent Title (中): 集成n型和p型金属栅晶体管
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Application No.: US11248737Application Date: 2005-10-11
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Publication No.: US07316949B2Publication Date: 2008-01-08
- Inventor: Mark Doczy , Justin K. Brask , Steven J. Keating , Chris E. Barns , Brian S. Doyle , Michael L. McSwiney , Jack T. Kavalieros , John P. Barnak
- Applicant: Mark Doczy , Justin K. Brask , Steven J. Keating , Chris E. Barns , Brian S. Doyle , Michael L. McSwiney , Jack T. Kavalieros , John P. Barnak
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/8234
Abstract:
At least a p-type and n-type semiconductor device deposited upon a semiconductor wafer containing metal or metal alloy gates. More particularly, a complementary metal-oxide-semiconductor (CMOS) device is formed on a semiconductor wafer having n-type and p-type metal gates.
Public/Granted literature
- US20060030104A1 Integrating n-type and p-type metal gate transistors Public/Granted day:2006-02-09
Information query
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