发明授权
- 专利标题： Apparatus and methods for providing redundancy in integrated circuits
- 专利标题（中）： 在集成电路中提供冗余的装置和方法
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申请号： US10757928申请日： 2004-01-15
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公开(公告)号： US07321518B1公开(公告)日： 2008-01-22
- 发明人: Joseph Huang , Chiakang Sung , Philip Pan , Yan Chong
- 申请人： Joseph Huang , Chiakang Sung , Philip Pan , Yan Chong
- 申请人地址： US CA San Jose
- 专利权人： Altera Corporation
- 当前专利权人： Altera Corporation
- 当前专利权人地址： US CA San Jose
- 代理机构： Law Offices of Maximilian R. Peterson
- 主分类号： G11C7/00
- IPC分类号： G11C7/00 ; G11C29/00 ; G06F7/38 ; H03K19/177
摘要：
An integrated circuit (IC) includes a redundancy feature. The redundancy feature is provided by a redundancy circuitry within the IC. The redundancy circuitry is configured to provide the redundancy by using a decoder circuitry. The decoder circuitry receives and decodes coded defect information from a set of circuit elements adapted to provide the coded defect information.
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