Invention Grant
US07321950B2 Method and apparatus for managing write-to-read turnarounds in an early read after write memory system
有权
用于在写入存储器系统之后的早期读取中管理写入读取周转的方法和装置
- Patent Title: Method and apparatus for managing write-to-read turnarounds in an early read after write memory system
- Patent Title (中): 用于在写入存储器系统之后的早期读取中管理写入读取周转的方法和装置
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Application No.: US11050021Application Date: 2005-02-03
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Publication No.: US07321950B2Publication Date: 2008-01-22
- Inventor: Mark David Bellows , Paul Allen Ganfield , Kent Harold Haselhorst , Ryan Abel Heckendorf , Tolga Ozguner
- Applicant: Mark David Bellows , Paul Allen Ganfield , Kent Harold Haselhorst , Ryan Abel Heckendorf , Tolga Ozguner
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Van Leeuwen & Van Leeuwen
- Agent D'Ann N. Rifai
- Main IPC: G06F12/00
- IPC: G06F12/00

Abstract:
A method and apparatus for managing write-to-read turnarounds in an early read after write memory system are presented. Memory controller logic identifies a write operation's bank set, allows a different bank set read operation to issue prior to the write operation's completion, and allows a same bank set read operation to issue once the write operation completes. The memory controller includes operation counter logic, operation selection logic, operation acceptance logic, command formatting logic, and memory interface logic. The operation counter logic receives new-operation-related signals from the operation acceptance logic and, in turn, provides signals to the operation selection logic and the operation acceptance logic as to when to issue a read operation that corresponds to either an even DRAM bank or an odd DRAM bank.
Public/Granted literature
- US20060174082A1 Method and apparatus for managing write-to-read turnarounds in an early read after write memory system Public/Granted day:2006-08-03
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