Invention Grant
- Patent Title: Method of reducing film stress on overlay mark
- Patent Title (中): 降低覆膜标记膜应力的方法
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Application No.: US11715527Application Date: 2007-03-07
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Publication No.: US07323393B2Publication Date: 2008-01-29
- Inventor: Yu-Lin Yen , Ching-Yu Chang
- Applicant: Yu-Lin Yen , Ching-Yu Chang
- Applicant Address: TW Hsinchu
- Assignee: Macronix International Co., Ltd.
- Current Assignee: Macronix International Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Stout, Uxa, Buyan & Mullins, LLP
- Main IPC: H01L21/76
- IPC: H01L21/76

Abstract:
An integrated circuit capable of operating despite a profile shift is disclosed. Overlay marks on the integrated circuit are surrounded by a trench that tends to relieve the effect of a profile shift caused by stress applied to the integrated circuit. The position of the overlay marks tends, therefore, not to be affected by the stress.
Public/Granted literature
- US20070166946A1 Method of reducing film stress on overlay mark Public/Granted day:2007-07-19
Information query
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