发明授权
- 专利标题: Multiple-gate MOS transistor and a method of manufacturing the same
- 专利标题(中): 多门MOS晶体管及其制造方法
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申请号: US11727268申请日: 2007-03-26
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公开(公告)号: US07332774B2公开(公告)日: 2008-02-19
- 发明人: Young Kyun Cho , Sung Ku Kwon , Tae Moon Roh , Dae Woo Lee , Jong Dae Kim
- 申请人: Young Kyun Cho , Sung Ku Kwon , Tae Moon Roh , Dae Woo Lee , Jong Dae Kim
- 申请人地址: KR Daejeon-Shi
- 专利权人: Electronics and Telecommunications Research Institute
- 当前专利权人: Electronics and Telecommunications Research Institute
- 当前专利权人地址: KR Daejeon-Shi
- 代理机构: Lowe Hauptman Ham & Berner LLP
- 优先权: KR2004-37571 20040525
- 主分类号: H01L29/76
- IPC分类号: H01L29/76 ; H01L29/94
摘要:
Provided is a multiple-gate metal oxide semiconductor (MOS) transistor and a method for manufacturing the same, in which a channel is implemented in a streamline shape, an expansion region is implemented in a gradually increased form, and source and drain regions is implemented in an elevated structure by using a difference of a thermal oxidation rate depending on a crystal orientation of silicon and a geographical shape of the single-crystal silicon pattern. As the channel is formed in a streamline shape, it is possible to prevent the degradation of reliability due to concentration of an electric field and current driving capability by the gate voltage is improved because the upper portion and both sides of the channel are surrounded by the gate electrodes. In addition, a current crowding effect is prevented due to the expansion region increased in size and source and drain series resistance is reduced by elevated source and drain structures, thereby increasing the current driving capability.
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