Invention Grant
- Patent Title: Semiconductor device
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Application No.: US11826569Application Date: 2007-07-17
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Publication No.: US07332776B2Publication Date: 2008-02-19
- Inventor: Toshiaki Iwamatsu , Yuuichi Hirano , Takashi Ipposhi
- Applicant: Toshiaki Iwamatsu , Yuuichi Hirano , Takashi Ipposhi
- Applicant Address: JP Tokyo
- Assignee: Renesas Technology Corp.
- Current Assignee: Renesas Technology Corp.
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JP2004-165480 20040603
- Main IPC: H01L27/01
- IPC: H01L27/01

Abstract:
A partial isolation insulating film provided between MOS transistors in an NMOS region and a PMOS region, respectively, has a structure in which a portion protruding upward from a main surface of an SOI layer is of greater thickness than a trench depth, namely, a portion (isolation portion) extending below the surface of the SOI layer, and the SOI layer under the partial isolation insulating film is of greater thickness than the isolation portion.
Public/Granted literature
- US20070257330A1 Semiconductor device Public/Granted day:2007-11-08
Information query
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