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US07334169B2 Generation of test mode signals in memory device with minimized wiring 失效
在最小化布线的情况下在存储器件中产生测试模式信号

Generation of test mode signals in memory device with minimized wiring
摘要：
A memory device includes a plurality of test mode signal generating units and a plurality of test circuits. Each test mode signal generating unit generates a respective test mode signal for a respective test circuit. The test mode signal generating units generate the test mode signals in series for the test circuits. Each test mode signal generating unit may be disposed within a respective test circuit such that wiring is not necessary from the source of the test mode signals to the test circuits.
摘要（中）：

存储器件包括多个测试模式信号发生单元和多个测试电路。 每个测试模式信号产生单元为相应的测试电路产生相应的测试模式信号。 测试模式信号发生单元为测试电路产生串联的测试模式信号。 每个测试模式信号产生单元可以设置在相应的测试电路内，使得不需要从测试模式信号的源到测试电路的布线。

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