Invention Grant
US07354830B2 Methods of forming semiconductor devices with high-k gate dielectric
有权
用高k栅极电介质形成半导体器件的方法
- Patent Title: Methods of forming semiconductor devices with high-k gate dielectric
- Patent Title (中): 用高k栅极电介质形成半导体器件的方法
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Application No.: US11377105Application Date: 2006-03-16
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Publication No.: US07354830B2Publication Date: 2008-04-08
- Inventor: Chun-Chieh Lin , Wen-Chin Lee , Chenming Hu , Shang-Chih Chen , Chih-Hao Wang , Fu-Liaog Yang , Yee-Chia Yeo
- Applicant: Chun-Chieh Lin , Wen-Chin Lee , Chenming Hu , Shang-Chih Chen , Chih-Hao Wang , Fu-Liaog Yang , Yee-Chia Yeo
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L21/8234
- IPC: H01L21/8234

Abstract:
A method of fabricating an integrated circuit is provided. A first gate dielectric portion is formed on a substrate in a first transistor region. The first gate dielectric portion includes a first high-permittivity dielectric material. The first gate dielectric portion has a first equivalent silicon oxide thickness. A second gate dielectric portion is formed on the substrate in a second transistor region. The second gate dielectric portion includes the first high-permittivity dielectric material. The second gate dielectric portion has a second equivalent silicon oxide thickness. The second equivalent silicon oxide thickness is different than the first equivalent silicon oxide thickness.
Public/Granted literature
- US20060177997A1 Methods of forming semiconductor devices with high-k gate dielectric Public/Granted day:2006-08-10
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