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US07356787B2 Alternative methodology for defect simulation and system 有权
缺陷模拟和系统的替代方法

Alternative methodology for defect simulation and system
Abstract:
A system for defect simulation is provided. A defect layout generator generates a defect layout comprising a given number of spot defects of a given size. A processor first compares the defect layout and a provided circuit layout comprising a plurality of conductive regions. The processor further determines whether the spot defects are located on the conductive regions, and determines whether short-circuits and/or open circuits are caused by the spot defects in the conductive regions.
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