Invention Grant
- Patent Title: Alternative methodology for defect simulation and system
- Patent Title (中): 缺陷模拟和系统的替代方法
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Application No.: US11099834Application Date: 2005-04-06
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Publication No.: US07356787B2Publication Date: 2008-04-08
- Inventor: Jui-Jung Yan , Chung-Min Fu , Ricky Yang
- Applicant: Jui-Jung Yan , Chung-Min Fu , Ricky Yang
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Thomas, Kayden, Horstemeyer & Risley
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A system for defect simulation is provided. A defect layout generator generates a defect layout comprising a given number of spot defects of a given size. A processor first compares the defect layout and a provided circuit layout comprising a plurality of conductive regions. The processor further determines whether the spot defects are located on the conductive regions, and determines whether short-circuits and/or open circuits are caused by the spot defects in the conductive regions.
Public/Granted literature
- US20060230371A1 Alternative methodology for defect simulation and system Public/Granted day:2006-10-12
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