发明授权
US07363609B2 Method of logic circuit synthesis and design using a dynamic circuit library
有权
使用动态电路库的逻辑电路合成与设计方法
- 专利标题: Method of logic circuit synthesis and design using a dynamic circuit library
- 专利标题(中): 使用动态电路库的逻辑电路合成与设计方法
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申请号: US09915437申请日: 2001-07-26
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公开(公告)号: US07363609B2公开(公告)日: 2008-04-22
- 发明人: Sang Hoo Dhong , Harm Peter Hofstee , Stephen Douglas Posluszny , Joel Abraham Silberman , Osamu Takahashi , Dieter F. Wendel
- 申请人: Sang Hoo Dhong , Harm Peter Hofstee , Stephen Douglas Posluszny , Joel Abraham Silberman , Osamu Takahashi , Dieter F. Wendel
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: The Culbertson Group, P.C.
- 代理商 Casimer K. Salys; Russell D. Culbertson
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
The circuit library available for logic synthesis is limited to a single dynamic circuit block or logic synthesis block. The circuit design method includes first defining the logic synthesis block (16) and then performing logic synthesis (17) for a predetermined logical operation to be implemented. The logic synthesis step constrained to the single logic synthesis block produces an intermediate circuit design (29) which necessarily comprises a series of dynamic circuit blocks, each associated with a single reset signal. Once the intermediate circuit (29) is produced, the circuit design method includes eliminating unnecessary devices (46) from the intermediate circuit (29) to produce a final logic circuit, and then sizing the devices (48) in the final circuit to complete the design.
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