发明授权
- 专利标题： Method, system, and apparatus for loopback entry and exit
- 专利标题（中）： 用于环回进入和退出的方法，系统和设备
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申请号： US10897596申请日： 2004-07-23
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公开(公告)号： US07366964B2公开(公告)日： 2008-04-29
- 发明人: Tim Frodsham , Naveen Cherukuri , Sanjay Dabral , David S Dunning , Theodore Z Schoenborn , Lakshminarayan Krishnamurty
- 申请人： Tim Frodsham , Naveen Cherukuri , Sanjay Dabral , David S Dunning , Theodore Z Schoenborn , Lakshminarayan Krishnamurty
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Trop, Pruner & Hu, P.C.
- 主分类号： G01R31/28
- IPC分类号： G01R31/28 ; G01R31/08
摘要：
A loopback test to test a communication link for a layered interface where in a master agent programs the electrical parameters for the slave agent, such as, the offset, timing, and current compensation with a loopback control register. The slave and master agent to support an entry into the loopback test based on detection of a header within a packet. The slave and master agent to support exit out of the loopback test based on whether the loop count is finite.