Invention Grant
US07383418B2 Method and apparatus for prefetching data to a lower level cache memory
有权
用于将数据预取到较低级高速缓冲存储器的方法和装置
- Patent Title: Method and apparatus for prefetching data to a lower level cache memory
- Patent Title (中): 用于将数据预取到较低级高速缓冲存储器的方法和装置
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Application No.: US10933188Application Date: 2004-09-01
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Publication No.: US07383418B2Publication Date: 2008-06-03
- Inventor: Kenneth J. Janik , K S Venkatraman , Anwar Rohillah , Eric Sprangle , Ronak Singhal
- Applicant: Kenneth J. Janik , K S Venkatraman , Anwar Rohillah , Eric Sprangle , Ronak Singhal
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F9/34 ; G06F9/26
Abstract:
A prefetching scheme to detect when a load misses the lower level cache and hits the next level cache. Consequently, the prefetching scheme utilizes the previous information for the cache miss to the lower level cache and hit to the next higher level of cache memory that may result in initiating a sidedoor prefetch load for fetching the previous or next cache line into the lower level cache. In order to generate an address for the sidedoor prefetch, a history of cache access is maintained in a queue.
Public/Granted literature
- US20060047915A1 Method and apparatus for prefetching data to a lower level cache memory Public/Granted day:2006-03-02
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