- Patent Title: Methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating memory circuitry, integrated circuitry and memory integrated circuitry
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Application No.: US11200286Application Date: 2005-08-09
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Publication No.: US07387940B2Publication Date: 2008-06-17
- Inventor: Gurtej S. Sandhu , Robert D. Patraw , M. Ceredig Roberts , Keith R. Cook
- Applicant: Gurtej S. Sandhu , Robert D. Patraw , M. Ceredig Roberts , Keith R. Cook
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L21/76
- IPC: H01L21/76
Abstract:
The invention includes methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating integrated circuitry including memory circuitry, and integrated circuitry such as memory integrated circuitry.
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