发明授权
- 专利标题： Fabrication process for a semiconductor integrated circuit device
- 专利标题（中）： 半导体集成电路器件的制造工艺
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申请号： US11058601申请日： 2005-02-16
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公开(公告)号： US07387957B2公开(公告)日： 2008-06-17
- 发明人: Tatsuyuki Saito , Junji Noguchi , Hizuru Yamaguchi , Nobuo Owada
- 申请人： Tatsuyuki Saito , Junji Noguchi , Hizuru Yamaguchi , Nobuo Owada
- 申请人地址： JP Tokyo
- 专利权人： Hitachi, Ltd.
- 当前专利权人： Hitachi, Ltd.
- 当前专利权人地址： JP Tokyo
- 代理机构： Antonelli, Terry, Stout & Kraus, LLP.
- 优先权： JP9-234236 19970829; JP10-182813 19980629
- 主分类号： H01L21/4763
- IPC分类号： H01L21/4763
摘要：
In a fabrication process of a semiconductor integrated circuit device, upon effecting connection of an interconnection made of aluminum or aluminum alloy and another interconnection made of Cu or Cu alloy, a barrier conductor film or plug is disposed at the joint portion between these interconnections. Among the interconnection layers formed, the uppermost one is made of a wiring material such as aluminum or aluminum alloy, while the lower one is made of Cu or Cu alloy. The lowest interconnection is made of a conductive material other than Cu or Cu alloy. For example, the conductive material which permits minute processing and has both low resistance and high EM resistance such as tungsten is employed.
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