公开(公告)号：US20080230916A1

公开(公告)日：2008-09-25

申请号：US12126386

申请日：2008-05-23

申请人： Tatsuyuki Saito ,  Junji Noguchi ,  Hizuru Yamaguchi ,  Nobuo Owada

发明人： Tatsuyuki Saito ,  Junji Noguchi ,  Hizuru Yamaguchi ,  Nobuo Owada

IPC分类号： H01L23/52

CPC分类号： H01L21/76843 ,  H01L21/76838 ,  H01L21/7685 ,  H01L21/76877 ,  H01L21/76882 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53228 ,  H01L24/48 ,  H01L2224/05624 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01021 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor IC device includes a buried interconnection in interconnection layers over a semiconductor substrate, in which electrical connection of interconnections are provided over and under an interconnection layer of an embedded interconnection from among the interconnection layers such that a first connecting conductor portion within a connecting hole extending from an upper interconnection toward the interconnection layer of a predetermined buried interconnection and a second connecting conductor portion within the connecting hole extending from a lower interconnection toward the interconnection layer of the predetermined buried interconnection are electrically connected via a connecting conductor portion for relay in the connecting groove of the interconnection layer of a predetermined buried interconnection. The connecting conductor portion for relay is sized so that the length of the connecting conductor portion for relay in an extending direction of the predetermined buried interconnection is longer than that of the connecting hole.

摘要翻译： 半导体IC器件包括在半导体衬底上的互连层中的埋入互连，其中互连层的电连接在互连层之间设置在嵌入式互连的互连层之上和之下，使得连接孔内的第一连接导体部分 从上互连延伸到预定埋地布线的互连层，并且连接孔内的第二连接导体部分从下互连延伸到预定埋地互连的互连层，经由用于继电器的连接导体部分电连接 互连层的连接槽。 继电器的连接导体部分的尺寸设定成使得用于继电器的连接导体部分在预定的埋入互连的延伸方向上的长度比连接孔的长度长。

公开(公告)号：US07387957B2

公开(公告)日：2008-06-17

申请号：US11058601

申请日：2005-02-16

申请人： Tatsuyuki Saito ,  Junji Noguchi ,  Hizuru Yamaguchi ,  Nobuo Owada

发明人： Tatsuyuki Saito ,  Junji Noguchi ,  Hizuru Yamaguchi ,  Nobuo Owada

IPC分类号： H01L21/4763

CPC分类号： H01L21/76843 ,  H01L21/76838 ,  H01L21/7685 ,  H01L21/76877 ,  H01L21/76882 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53228 ,  H01L24/48 ,  H01L2224/05624 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01021 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： In a fabrication process of a semiconductor integrated circuit device, upon effecting connection of an interconnection made of aluminum or aluminum alloy and another interconnection made of Cu or Cu alloy, a barrier conductor film or plug is disposed at the joint portion between these interconnections. Among the interconnection layers formed, the uppermost one is made of a wiring material such as aluminum or aluminum alloy, while the lower one is made of Cu or Cu alloy. The lowest interconnection is made of a conductive material other than Cu or Cu alloy. For example, the conductive material which permits minute processing and has both low resistance and high EM resistance such as tungsten is employed.

摘要翻译： 在半导体集成电路器件的制造工艺中，在实现由铝或铝合金构成的互连和由Cu或Cu合金制成的另一互连的连接时，在这些互连之间的接合部分处设置阻挡导体膜或插塞。 在形成的互连层中，最上面的一个由诸如铝或铝合金的布线材料制成，而下层由Cu或Cu合金制成。 最低的互连由不是Cu或Cu合金的导电材料制成。 例如，采用允许微小加工且具有低电阻和高电阻电阻（如钨）的导电材料。

公开(公告)号：US06861756B2

公开(公告)日：2005-03-01

申请号：US10797017

申请日：2004-03-11

申请人： Tatsuyuki Saito ,  Junji Noguchi ,  Hizuru Yamaguchi ,  Nobuo Owada

发明人： Tatsuyuki Saito ,  Junji Noguchi ,  Hizuru Yamaguchi ,  Nobuo Owada

IPC分类号： H01L21/768 ,  H01L23/485 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76843 ,  H01L21/76838 ,  H01L21/7685 ,  H01L21/76877 ,  H01L21/76882 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53228 ,  H01L24/48 ,  H01L2224/05624 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01021 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： In a semiconductor integrated circuit device, upon connection of an interconnection made of aluminum or aluminum alloy and another interconnection made of Cu or Cu alloy, a barrier conductor film or plug is disposed at the joint portion between these interconnections. Among the interconnection layers, the uppermost one is made of a wiring material such as aluminum or aluminum alloy, while the lower, one is made of Cu or Cu alloy. The lowest interconnection is made of a conductive material other than Cu or Cu alloy. For example, the conductive material which permits minute processing and has both low resistance and high EM resistance such as tungsten is employed.

摘要翻译： 在半导体集成电路器件中，在连接由铝或铝合金制成的互连以及由Cu或Cu合金制成的另一个互连时，在这些互连之间的接合部分处设置阻挡导体膜或插塞。 在互连层中，最上面的一个由诸如铝或铝合金的布线材料制成，而下层由Cu或Cu合金制成。 最低的互连由不是Cu或Cu合金的导电材料制成。 例如，采用允许微小加工且具有低电阻和高电阻电阻（如钨）的导电材料。

公开(公告)号：US06731007B1

公开(公告)日：2004-05-04

申请号：US09613138

申请日：2000-07-10

申请人： Tatsuyuki Saito ,  Junji Noguchi ,  Hizuru Yamaguchi ,  Nobuo Owada

发明人： Tatsuyuki Saito ,  Junji Noguchi ,  Hizuru Yamaguchi ,  Nobuo Owada

IPC分类号： H01L2348

CPC分类号： H01L21/76843 ,  H01L21/76838 ,  H01L21/7685 ,  H01L21/76877 ,  H01L21/76882 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53228 ,  H01L24/48 ,  H01L2224/05624 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01021 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： In a semiconductor integrated circuit device, upon connection of an interconnection made of aluminum or aluminum alloy and another interconnection made of Cu or Cu alloy, a barrier conductor film or plug is disposed at the joint portion between these interconnections. Among the interconnection layers, the uppermost one is made of a wiring material such as aluminum or aluminum alloy, while the lower one is made of Cu or Cu alloy. The lowest interconnection is made of a conductive material other than Cu or Cu alloy. For example, the conductive material which permits minute processing and has both low resistance and high EM resistance such as tungsten is employed.

摘要翻译： 在半导体集成电路器件中，在连接由铝或铝合金制成的互连以及由Cu或Cu合金制成的另一个互连时，在这些互连之间的接合部分处设置阻挡导体膜或插塞。 在互连层中，最上面的一个由诸如铝或铝合金的布线材料制成，而下层由Cu或Cu合金制成。 最低的互连由不是Cu或Cu合金的导电材料制成。 例如，采用允许微小加工且具有低电阻和高电阻电阻（如钨）的导电材料。

公开(公告)号：US08384220B2

公开(公告)日：2013-02-26

申请号：US12126386

申请日：2008-05-23

申请人： Tatsuyuki Saito ,  Junji Noguchi ,  Hizuru Yamaguchi ,  Nobuo Owada

发明人： Tatsuyuki Saito ,  Junji Noguchi ,  Hizuru Yamaguchi ,  Nobuo Owada

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76843 ,  H01L21/76838 ,  H01L21/7685 ,  H01L21/76877 ,  H01L21/76882 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53228 ,  H01L24/48 ,  H01L2224/05624 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01021 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor IC device includes a buried interconnection in interconnection layers over a semiconductor substrate, in which electrical connection of interconnections are provided over and under an interconnection layer of an embedded interconnection from among the interconnection layers such that a first connecting conductor portion within a connecting hole extending from an upper interconnection toward the interconnection layer of a predetermined buried interconnection and a second connecting conductor portion within the connecting hole extending from a lower interconnection toward the interconnection layer of the predetermined buried interconnection are electrically connected via a connecting conductor portion for relay in the connecting groove of the interconnection layer of a predetermined buried interconnection. The connecting conductor portion for relay is sized so that the length of the connecting conductor portion for relay in an extending direction of the predetermined buried interconnection is longer than that of the connecting hole.

摘要翻译： 半导体IC器件包括在半导体衬底上的互连层中的埋入互连，其中互连层的电连接在互连层之间设置在嵌入式互连的互连层之上和之下，使得连接孔内的第一连接导体部分 从上互连延伸到预定埋地布线的互连层，并且连接孔内的第二连接导体部分从下互连延伸到预定埋地互连的互连层，经由用于继电器的连接导体部分电连接 互连层的连接槽。 继电器的连接导体部分的尺寸设定成使得用于继电器的连接导体部分在预定的埋入互连的延伸方向上的长度比连接孔的长度长。

公开(公告)号：US20050151264A1

公开(公告)日：2005-07-14

申请号：US11058601

申请日：2005-02-16

申请人： Tatsuyuki Saito ,  Junji Noguchi ,  Hizuru Yamaguchi ,  Nobuo Owada

发明人： Tatsuyuki Saito ,  Junji Noguchi ,  Hizuru Yamaguchi ,  Nobuo Owada

IPC分类号： H01L21/768 ,  H01L23/485 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L21/44

CPC分类号： H01L21/76843 ,  H01L21/76838 ,  H01L21/7685 ,  H01L21/76877 ,  H01L21/76882 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53228 ,  H01L24/48 ,  H01L2224/05624 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01021 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： In a fabrication process of a semiconductor integrated circuit device, upon effecting connection of an interconnection made of aluminum or aluminum alloy and another interconnection made of Cu or Cu alloy, a barrier conductor film or plug is disposed at the joint portion between these interconnections. Among the interconnection layers formed, the uppermost one is made of a wiring material such as aluminum or aluminum alloy, while the lower one is made of Cu or Cu alloy. The lowest interconnection is made of a conductive material other than Cu or Cu alloy. For example, the conductive material which permits minute processing and has both low resistance and high EM resistance such as tungsten is employed.

摘要翻译： 在半导体集成电路器件的制造工艺中，在实现由铝或铝合金构成的互连和由Cu或Cu合金制成的另一互连的连接时，在这些互连之间的接合部分处设置阻挡导体膜或插塞。 在形成的互连层中，最上面的一个由诸如铝或铝合金的布线材料制成，而下层由Cu或Cu合金制成。 最低的互连由不是Cu或Cu合金的导电材料制成。 例如，采用允许微小加工且具有低电阻和高电阻电阻（如钨）的导电材料。

公开(公告)号：US06849535B2

公开(公告)日：2005-02-01

申请号：US10128265

申请日：2002-04-24

申请人： Junji Noguchi ,  Naofumi Ohashi ,  Kenichi Takeda ,  Tatsuyuki Saito ,  Hizuru Yamaguchi ,  Nobuo Owada

发明人： Junji Noguchi ,  Naofumi Ohashi ,  Kenichi Takeda ,  Tatsuyuki Saito ,  Hizuru Yamaguchi ,  Nobuo Owada

IPC分类号： H01L21/3205 ,  H01L21/02 ,  H01L21/28 ,  H01L21/321 ,  H01L21/3213 ,  H01L21/70 ,  H01L21/768 ,  H01L23/532 ,  H01L21/44

CPC分类号： H01L21/0217 ,  H01L21/02063 ,  H01L21/02074 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/3185 ,  H01L21/3212 ,  H01L21/32136 ,  H01L21/67115 ,  H01L21/68792 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76838 ,  H01L21/7684 ,  H01L21/76882 ,  H01L21/76883 ,  H01L21/76886 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device comprises a semiconductor substrate; a first insulating film overlying a surface of the semiconductor substrate, an upper surface of the first insulating film being nitrided; a first copper-embedded interconnection embedded in the first insulating film, and which first copper-embedded interconnection contains copper as a main component; a copper nitride film overlying an upper surface of the first copper-embedded interconnection; a cap insulating film overlying an upper surface of the first insulating film and an upper surface of the copper nitride film; and a second insulting film overlying the cap insulating film.

摘要翻译： 半导体器件包括半导体衬底; 覆盖所述半导体衬底的表面的第一绝缘膜，所述第一绝缘膜的上表面被氮化; 嵌入在第一绝缘膜中的第一铜嵌入式互连，并且第一铜嵌入式互连以铜为主要成分; 覆盖在所述第一铜嵌入式互连件的上表面上的氮化铜膜; 覆盖在所述第一绝缘膜的上表面上的帽绝缘膜和所述氮化铜膜的上表面; 和覆盖绝缘膜的第二绝缘膜。

公开(公告)号：US06716749B2

公开(公告)日：2004-04-06

申请号：US10233430

申请日：2002-09-04

申请人： Junji Noguchi ,  Naofumi Ohashi ,  Kenichi Takeda ,  Tatsuyuki Saito ,  Hizuru Yamaguchi ,  Nobuo Owada

发明人： Junji Noguchi ,  Naofumi Ohashi ,  Kenichi Takeda ,  Tatsuyuki Saito ,  Hizuru Yamaguchi ,  Nobuo Owada

IPC分类号： H01L2144

CPC分类号： H01L21/0217 ,  H01L21/02063 ,  H01L21/02074 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/3185 ,  H01L21/3212 ,  H01L21/32136 ,  H01L21/67115 ,  H01L21/68792 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76838 ,  H01L21/7684 ,  H01L21/76882 ,  H01L21/76883 ,  H01L21/76886 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： After formation of Cu interconnections 46a to 46e each to be embedded in an interconnection groove 40 of a silicon oxide film 39 by CMP and then washing, the surface of each of the silicon oxide film 39 and Cu interconnections 46a to 46e is treated with a reducing plasma (ammonia plasma). Then, without vacuum break, a cap film (silicon nitride film) is formed continuously. This process makes it possible to improve the dielectric breakdown resistance (reliability) of a copper interconnection formed by the damascene method.

公开(公告)号：US06376345B1

公开(公告)日：2002-04-23

申请号：US09356707

申请日：1999-07-20

申请人： Naofumi Ohashi ,  Junji Noguchi ,  Toshinori Imai ,  Hizuru Yamaguchi ,  Nobuo Owada ,  Kenji Hinode ,  Yoshio Homma ,  Seiichi Kondo

发明人： Naofumi Ohashi ,  Junji Noguchi ,  Toshinori Imai ,  Hizuru Yamaguchi ,  Nobuo Owada ,  Kenji Hinode ,  Yoshio Homma ,  Seiichi Kondo

IPC分类号： H01L2138

CPC分类号： H01L21/0209 ,  G09G5/399 ,  H01L21/02074 ,  H01L21/3212 ,  H01L21/76838 ,  H01L21/7684 ,  Y10S438/906

摘要： In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.

公开(公告)号：US20080233736A1

公开(公告)日：2008-09-25

申请号：US12127564

申请日：2008-05-27

申请人： Naofumi Ohashi ,  Junji Noguchi ,  Toshinori Imai ,  Hizuru Yamaguchi ,  Nobuo Owada ,  Kenji Hinode ,  Yoshio Homma ,  Seiichi Kondo

发明人： Naofumi Ohashi ,  Junji Noguchi ,  Toshinori Imai ,  Hizuru Yamaguchi ,  Nobuo Owada ,  Kenji Hinode ,  Yoshio Homma ,  Seiichi Kondo

IPC分类号： H01L21/4763

CPC分类号： H01L21/0209 ,  G09G5/399 ,  H01L21/02074 ,  H01L21/3212 ,  H01L21/76838 ,  H01L21/7684 ,  Y10S438/906

摘要： In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.

摘要翻译： 为了提供通过化学机械抛光（CMP）方法形成的金属配线的防腐蚀技术，根据本发明的半导体集成电路器件的制造方法包括以下步骤：形成Cu（或Cu合金）的金属层 含有Cu作为主要成分），然后通过化学机械抛光（CMP）方法平坦化金属层以形成金属布线; 防止晶片的平面化主面在金属布线的表面上形成疏水性保护膜; 将晶圆的防腐主面浸入或保持湿润状态，使其不会变干; 并将晶片的主要表面保持在潮湿状态。