- 专利标题: Semiconductor integrated circuit device with reduced leakage current
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申请号: US11452275申请日: 2006-06-14
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公开(公告)号: US07388238B2公开(公告)日: 2008-06-17
- 发明人: Kenichi Osada , Koichiro Ishibashi , Yoshikazu Saitoh , Akio Nishida , Masaru Nakamichi , Naoki Kitai
- 申请人: Kenichi Osada , Koichiro Ishibashi , Yoshikazu Saitoh , Akio Nishida , Masaru Nakamichi , Naoki Kitai
- 申请人地址: JP Tokyo JP Tokyo
- 专利权人: Renesas Technology Corp.,Hitachi ULSI Systems Co., Ltd.
- 当前专利权人: Renesas Technology Corp.,Hitachi ULSI Systems Co., Ltd.
- 当前专利权人地址: JP Tokyo JP Tokyo
- 代理机构: Reed Smith LLP
- 代理商 Stanley P. Fisher, Esq.; Juan Carlos A. Marquez, Esq.
- 优先权: JP2001-168945 20010605; JP2002-017840 20020128
- 主分类号: H01L27/10
- IPC分类号: H01L27/10
摘要:
The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data.
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