发明授权
US07389383B2 Selectively unmarking load-marked cache lines during transactional program execution
有权
在事务性程序执行期间选择性地取消标记加载标记的高速缓存行
- 专利标题: Selectively unmarking load-marked cache lines during transactional program execution
- 专利标题(中): 在事务性程序执行期间选择性地取消标记加载标记的高速缓存行
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申请号: US11399049申请日: 2006-04-06
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公开(公告)号: US07389383B2公开(公告)日: 2008-06-17
- 发明人: Marc Tremblay , Quinn A. Jacobson , Shailender Chaudhry , Mark S. Moir , Maurice P. Herlihy
- 申请人: Marc Tremblay , Quinn A. Jacobson , Shailender Chaudhry , Mark S. Moir , Maurice P. Herlihy
- 申请人地址: US CA Santa Clara
- 专利权人: Sun Microsystems, Inc.
- 当前专利权人: Sun Microsystems, Inc.
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Park, Vaughan & Fleming LLP
- 主分类号: G06F12/00
- IPC分类号: G06F12/00 ; G06F13/00 ; G06F13/28
摘要:
One embodiment of the present invention provides a system that facilitates selectively unmarking load-marked cache lines during transactional program execution, wherein load-marked cache lines are monitored during transactional execution to detect interfering accesses from other threads. During operation, the system encounters a release instruction during transactional execution of a block of instructions. In response to the release instruction, the system modifies the state of cache lines, which are specially load-marked to indicate they can be released from monitoring, to account for the release instruction being encountered. In doing so, the system can potentially cause the specially load-marked cache lines to become unmarked. In a variation on this embodiment, upon encountering a commit-and-start-new-transaction instruction, the system modifies load-marked cache lines to account for the commit-and-start-new-transaction instruction being encountered. In doing so, the system causes normally load-marked cache lines to become unmarked, while other specially load-marked cache lines may remain load-marked past the commit-and-start-new-transaction instruction.
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