Invention Grant
- Patent Title: Methods and apparatus to dynamically insert prefetch instructions based on compiler and garbage collector analysis
- Patent Title (中): 基于编译器和垃圾回收器分析动态插入预取指令的方法和装置
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Application No.: US10742009Application Date: 2003-12-19
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Publication No.: US07389385B2Publication Date: 2008-06-17
- Inventor: Mauricio J. Serrano , Sreenivas Subramoney , Richard L. Hudson , Ali-Reza Adl-Tabatabai
- Applicant: Mauricio J. Serrano , Sreenivas Subramoney , Richard L. Hudson , Ali-Reza Adl-Tabatabai
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Hanley, Flight & Zimmerman, LLC
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F9/26 ; G06F9/45 ; G06F11/30

Abstract:
Methods and apparatus to insert prefetch instructions based on garbage collector analysis and compiler analysis are disclosed. In an example method, one or more batches of samples associated with cache misses from a performance monitoring unit in a processor system are received. One or more samples from the one or more batches of samples based on delinquent information are selected. A performance impact indicator associated with the one or more samples is generated. Based on the performance indicator, at least one of a garbage collector analysis and a compiler analysis is initiated to identify one or more delinquent paths. Based on the at least one of the garbage collector analysis and the compiler analysis, one or more prefetch points to insert prefetch instructions are identified.
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