发明授权
US07392366B2 Adaptive fetch gating in multithreaded processors, fetch control and method of controlling fetches 有权
多线程处理器中的自适应提取门控,提取控制和控制提取的方法

Adaptive fetch gating in multithreaded processors, fetch control and method of controlling fetches
摘要:
A multithreaded processor, fetch control for a multithreaded processor and a method of fetching in the multithreaded processor. Processor event and use (EU) signs are monitored for downstream pipeline conditions indicating pipeline execution thread states. Instruction cache fetches are skipped for any thread that is incapable of receiving fetched cache contents, e.g., because the thread is full or stalled. Also, consecutive fetches may be selected for the same thread, e.g., on a branch mis-predict. Thus, the processor avoids wasting power on unnecessary or place keeper fetches.
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