发明授权
US07398506B2 Net list producing device producing a net list with an interconnection parasitic element by hierarchical processing
失效
网表制作装置，通过分层处理产生具有互连寄生元件的网络列表
- 专利标题： Net list producing device producing a net list with an interconnection parasitic element by hierarchical processing
- 专利标题（中）： 网表制作装置，通过分层处理产生具有互连寄生元件的网络列表
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申请号： US11358101申请日： 2006-02-22
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公开(公告)号： US07398506B2公开(公告)日： 2008-07-08
- 发明人: Toshiki Kanamoto , Mitsutoshi Shirota , Michiko Uchimura
- 申请人： Toshiki Kanamoto , Mitsutoshi Shirota , Michiko Uchimura
- 申请人地址： JP Tokyo
- 专利权人： Renesas Technology Corp.
- 当前专利权人： Renesas Technology Corp.
- 当前专利权人地址： JP Tokyo
- 代理机构： McDermott Will & Emery LLP
- 优先权： JP2005-048775 20050224
- 主分类号： G06F17/50
- IPC分类号： G06F17/50
摘要：
A memory cell information producing unit obtains physical terminal coordinates, physical terminal names and logical terminal names of a memory cell and layout data, and operates based on them to specify parasitic elements parasitic on interconnections of the memory cell, and to produce memory cell information including the physical terminal names and representing physical properties and a connection relationship of inner elements of the memory cell and the parasitic elements. Memory cell array information producing unit obtains connection information determining the connection relationship of physical terminals of the memory cell, assigns node names to the physical terminals of the memory cell based on the connection information, and produces memory cell array information representing the node names of all the memory cells. A memory cell array net list producing unit produces a net list of the memory cell array formed of the memory cell information and the memory cell array information.