发明授权
- 专利标题: Fabrication method of semiconductor integrated circuit device
- 专利标题(中): 半导体集成电路器件的制造方法
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申请号: US11936358申请日: 2007-11-07
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公开(公告)号: US07422914B2公开(公告)日: 2008-09-09
- 发明人: Yuji Wada , Akira Seito , Masaaki Namba
- 申请人: Yuji Wada , Akira Seito , Masaaki Namba
- 申请人地址: JP Tokyo
- 专利权人: Renesas Technology Corp.
- 当前专利权人: Renesas Technology Corp.
- 当前专利权人地址: JP Tokyo
- 代理机构: Antonelli, Terry, Stout & Kraus, LLP.
- 优先权: JP2003-425616 20031222
- 主分类号: G01R31/26
- IPC分类号: G01R31/26
摘要:
A memory test is carried out on semiconductor integrated circuit devices including a semiconductor memory at low cost with efficiency. In a test burn-in system, twenty-four test boards are processed in sequence with time differences, and the test boards are circulated one by one. In this case, the memory test is conducted with the sequence of single board processing: the test is started with a test board in which semiconductor integrated circuit devices have been embedded, and semiconductor integrated circuit devices are discharged, beginning with a test board that has undergone the test.
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