Invention Grant
- Patent Title: Methods of fabricating vertical channel field effect transistors having insulating layers thereon
- Patent Title (中): 制造其上具有绝缘层的垂直沟道场效应晶体管的方法
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Application No.: US11556804Application Date: 2006-11-06
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Publication No.: US07459359B2Publication Date: 2008-12-02
- Inventor: Tai-Su Park , Eui-Joon Yoon , U-In Chung , Si-Young Choi , Jong-Ho Lee
- Applicant: Tai-Su Park , Eui-Joon Yoon , U-In Chung , Si-Young Choi , Jong-Ho Lee
- Applicant Address: KR
- Assignee: Samsung Electronic Co., Ltd.
- Current Assignee: Samsung Electronic Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel Sibley & Sajovec, P.A.
- Priority: KR10-2003-0010402 20030219
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/8234

Abstract:
A method of forming a field effect transistor includes forming a vertical channel protruding from a substrate including a source/drain region junction between the vertical channel and the substrate, and forming an insulating layer extending on a side wall of the vertical channel toward the substrate to beyond the source/drain region junction. The method may also include forming a nitride layer extending on the side wall away from the substrate to beyond the insulating layer, forming a second insulating layer extending on the side wall that is separated from the channel by the nitride layer, and forming a gate electrode extending on the side wall toward the substrate to beyond the source/drain region junction.
Public/Granted literature
- US20070066018A1 METHODS OF FABRICATING VERTICAL CHANNEL FIELD EFFECT TRANSISTORS HAVING INSULATING LAYERS THEREON Public/Granted day:2007-03-22
Information query
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