发明授权
- 专利标题: Method of manufacturing a semiconductor heterostructure
- 专利标题(中): 半导体异质结构的制造方法
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申请号: US11674392申请日: 2007-02-13
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公开(公告)号: US07459374B2公开(公告)日: 2008-12-02
- 发明人: Cécile Aulnette , Christophe Figuet , Nicolas Daval
- 申请人: Cécile Aulnette , Christophe Figuet , Nicolas Daval
- 申请人地址: FR Bernin
- 专利权人: S.O.I.Tec Silicon on Insulator Technologies
- 当前专利权人: S.O.I.Tec Silicon on Insulator Technologies
- 当前专利权人地址: FR Bernin
- 代理机构: Winston & Strawn LLP
- 优先权: EP06291860 20061130
- 主分类号: H01L21/00
- IPC分类号: H01L21/00 ; H01L21/302
摘要:
A method for manufacturing a semiconductor heterostructure by first manufacturing a donor wafer having a first substrate with a first in-plane lattice parameter, a spatially graded buffer layer having a second in-plane lattice parameter, and a strained smoothing layer of a semiconductor material having a third in-plane lattice parameter which has a value between that of the first and second lattice parameters. A top layer is formed on the ungraded layer a top layer of a semiconductor material having a top surface, optionally with a superficial layer present on the top surface and having a thickness that is equal to or smaller than 10 nanometers. Next, a handle wafer of a second substrate having an insulator layer thereon is bonded with the donor wafer in such way that (a) the insulator layer of the handle wafer is bonded directly onto the top surface of the top layer of the donor wafer, or (b) the insulator layer of the handle wafer is bonded onto the superficial layer.
公开/授权文献
- US20080132031A1 METHOD OF MANUFACTURING A SEMICONDUCTOR HETEROSTRUCTURE 公开/授权日:2008-06-05