Invention Grant
- Patent Title: Rational number frequency multiplier circuit and method for generated rational number frequency
- Patent Title (中): 合理数倍频电路和方法生成有理数频率
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Application No.: US11161955Application Date: 2005-08-24
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Publication No.: US07466786B2Publication Date: 2008-12-16
- Inventor: Wen-Hwa Chou , Yu-Kuo Chen , Kuo-Jen Kuo
- Applicant: Wen-Hwa Chou , Yu-Kuo Chen , Kuo-Jen Kuo
- Applicant Address: TW Taipei
- Assignee: Prolific Technology Inc.
- Current Assignee: Prolific Technology Inc.
- Current Assignee Address: TW Taipei
- Agency: Jiang Chyun IP Office
- Priority: TW94119010A 20050609
- Main IPC: H03D3/24
- IPC: H03D3/24

Abstract:
A rational number frequency multiplier circuit and a method for generating rational number multiple frequency are disclosed. The circuit receives a plurality of input signals having the same frequency and different phase, and outputs at least one multiple frequency signal. The rational number frequency multiplier circuit includes a frequency divider module, for receiving and dividing the input signals to output frequency-divided signals having the same frequency and different phase; a first phase synthesis module and a second phase synthesis module for receiving and synthesizing the frequency-divided and input signals respectively into a plurality of first pulse period signals and second pulse period signals; and an adder for receiving and combining the first pulse period signals and the second pulse period signals into the multiple frequency signal according to the desired multiplication of the frequency.
Public/Granted literature
- US20060280275A1 RATIONAL NUMBER FREQUENCY MULTIPLIER CIRCUIT AND METHOD FOR GENERATED RATIONAL NUMBER FREQUENCY Public/Granted day:2006-12-14
Information query
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