公开(公告)号：US07924209B2

公开(公告)日：2011-04-12

申请号：US12478785

申请日：2009-06-05

Applicant: Kuo-Jen Kuo ,  Kang-Shou Chang ,  Yu-Lung Hung

Inventor： Kuo-Jen Kuo ,  Kang-Shou Chang ,  Yu-Lung Hung

IPC: H03M1/12

CPC classification number: H03M1/1061 ,  H03M1/804

Abstract: A self-calibration circuit and method for capacitors are provided. A capacitor array is calibrated to approximate a reference capacitor according to an average parameter generated by calibrating the capacitor array multiple times. Since the capacitance of the compensation capacitor required to be connected to the target capacitor in parallel is determined according to the average parameter generated by performing the calibration multiple times, the error caused by a single calibration can be reduced, and meanwhile the calibration error caused by a reference voltage error or noise is reduced.

Abstract translation: 提供了一种用于电容器的自校准电路和方法。 根据通过多次校准电容器阵列产生的平均参数，校准电容器阵列以近似参考电容器。 由于需要并联连接到目标电容器的补偿电容器的电容根据通过执行校准多次产生的平均参数来确定，所以可以减少由单次校准引起的误差，同时由 参考电压误差或噪声降低。

公开(公告)号：US20100201552A1

公开(公告)日：2010-08-12

申请号：US12478785

申请日：2009-06-05

Applicant: Kuo-Jen Kuo ,  Kang-Shou Chang ,  Yu-Lung Hung

Inventor： Kuo-Jen Kuo ,  Kang-Shou Chang ,  Yu-Lung Hung

IPC: H03M1/10

CPC classification number: H03M1/1061 ,  H03M1/804

Abstract: A self-calibration circuit and method for capacitors are provided. A capacitor array is calibrated to approximate a reference capacitor according to an average parameter generated by calibrating the capacitor array multiple times. Since the capacitance of the compensation capacitor required to be connected to the target capacitor in parallel is determined according to the average parameter generated by performing the calibration multiple times, the error caused by a single calibration can be reduced, and meanwhile the calibration error caused by a reference voltage error or noise is reduced.

Abstract translation: 提供了一种用于电容器的自校准电路和方法。 根据通过多次校准电容器阵列产生的平均参数，校准电容器阵列以近似参考电容器。 由于需要并联连接到目标电容器的补偿电容器的电容根据通过执行校准多次产生的平均参数来确定，所以可以减少由单次校准引起的误差，同时由 参考电压误差或噪声降低。

公开(公告)号：US20060280275A1

公开(公告)日：2006-12-14

申请号：US11161955

申请日：2005-08-24

Applicant: Wen-Hwa Chou ,  Yu-Kuo Chen ,  Kuo-Jen Kuo

Inventor： Wen-Hwa Chou ,  Yu-Kuo Chen ,  Kuo-Jen Kuo

IPC: H03D3/24

CPC classification number: H03K5/00006 ,  H03L7/06

Abstract: A rational number frequency multiplier circuit and a method for generating rational number multiple frequency are disclosed. The circuit receives a plurality of input signals having the same frequency and different phase, and outputs at least one multiple frequency signal. The rational number frequency multiplier circuit includes a frequency divider module, for receiving and dividing the input signals to output frequency-divided signals having the same frequency and different phase; a first phase synthesis module and a second phase synthesis module for receiving and synthesizing the frequency-divided and input signals respectively into a plurality of first pulse period signals and second pulse period signals; and an adder for receiving and combining the first pulse period signals and the second pulse period signals into the multiple frequency signal according to the desired multiplication of the frequency.

Abstract translation: 公开了一种有理数倍频电路和一种产生有理数倍频率的方法。 电路接收具有相同频率和不同相位的多个输入信号，并输出至少一个多频信号。 有理数倍频电路包括分频器模块，用于接收和分频输入信号以输出具有相同频率和不同相位的分频信号; 第一相位合成模块和第二相位合成模块，用于分别将分频和输入信号分别接收并合成多个第一脉冲周期信号和第二脉冲周期信号; 以及加法器，用于根据频率的期望乘法接收并组合第一脉冲周期信号和第二脉冲周期信号到多频信号中。

公开(公告)号：US20100176775A1

公开(公告)日：2010-07-15

申请号：US12400809

申请日：2009-03-10

Applicant: Kuo-Jen Kuo ,  Yu-Lung Hung ,  Kang-Shou Chang

Inventor： Kuo-Jen Kuo ,  Yu-Lung Hung ,  Kang-Shou Chang

IPC: G05F1/10

CPC classification number: G05F1/56

Abstract: A voltage regulator includes a comparator, a first voltage output unit, a second voltage output unit, a third voltage output unit, a first switch and a second switch. The voltage regulator receives an operating voltage and a reference voltage generated by a reference voltage generator, and then outputs a corresponding output voltage. The voltage regulator of the present invention can provide an operation mode, a suspend mode and a standby mode and can be switched among these modes to provide corresponding current driving capacity for respective operation states. When in the operation mode, the voltage regulator can supply a great current. When in the suspend mode, the voltage regulator consumes less power. When in the standby mode, the voltage regulator consumes even less power.

Abstract translation: 电压调节器包括比较器，第一电压输出单元，第二电压输出单元，第三电压输出单元，第一开关和第二开关。 电压调节器接收由参考电压发生器产生的工作电压和参考电压，然后输出相应的输出电压。 本发明的电压调节器可以提供操作模式，暂停模式和待机模式，并且可以在这些模式之间切换，以为相应的操作状态提供对应的电流驱动能力。 在运行模式下，电压调节器可以提供较大的电流。 当处于暂停模式时，电压调节器消耗的功率较小。 当处于待机模式时，电压调节器消耗更少的功率。

公开(公告)号：US20080111586A1

公开(公告)日：2008-05-15

申请号：US11612476

申请日：2006-12-19

Applicant: Kuo-Jen Kuo ,  Ho-Fu Chen

Inventor： Kuo-Jen Kuo ,  Ho-Fu Chen

IPC: H03K5/22

CPC classification number: H03K5/22

Abstract: An electronic device for determining a type of a memory includes a comparator and a reset controller. The comparator for generating a discrimination signal according to a reference voltage and a first voltage of the memory, includes a first input end for receiving the first voltage, a second input end for receiving the reference voltage, a logic circuit coupled to the first input end and the second input end, for comparing the first voltage and the reference voltage so as to generate the discrimination signal, and an output end coupled to the logic circuit, for outputting the discrimination signal. The reset controller is used for determining the type of the memory according to the discrimination signal.

Abstract translation: 用于确定存储器类型的电子设备包括比较器和复位控制器。 用于根据参考电压和存储器的第一电压产生识别信号的比较器包括用于接收第一电压的第一输入端，用于接收参考电压的第二输入端，耦合到第一输入端的逻辑电路 以及第二输入端，用于比较第一电压和参考电压以产生鉴别信号，以及耦合到逻辑电路的输出端，用于输出鉴别信号。 复位控制器用于根据鉴别信号确定存储器的类型。

公开(公告)号：US07906952B2

公开(公告)日：2011-03-15

申请号：US12400809

申请日：2009-03-10

Applicant: Kuo-Jen Kuo ,  Yu-Lung Hung ,  Kang-Shou Chang

Inventor： Kuo-Jen Kuo ,  Yu-Lung Hung ,  Kang-Shou Chang

IPC: G05F1/40

CPC classification number: G05F1/56

Abstract: A voltage regulator includes a comparator, a first voltage output unit, a second voltage output unit, a third voltage output unit, a first switch and a second switch. The voltage regulator receives an operating voltage and a reference voltage generated by a reference voltage generator, and then outputs a corresponding output voltage. The voltage regulator of the present invention can provide an operation mode, a suspend mode and a standby mode and can be switched among these modes to provide corresponding current driving capacity for respective operation states. When in the operation mode, the voltage regulator can supply a great current. When in the suspend mode, the voltage regulator consumes less power. When in the standby mode, the voltage regulator consumes even less power.

Abstract translation: 电压调节器包括比较器，第一电压输出单元，第二电压输出单元，第三电压输出单元，第一开关和第二开关。 电压调节器接收由参考电压发生器产生的工作电压和参考电压，然后输出相应的输出电压。 本发明的电压调节器可以提供操作模式，暂停模式和待机模式，并且可以在这些模式之间切换，以为相应的操作状态提供对应的电流驱动能力。 在运行模式下，电压调节器可以提供较大的电流。 当处于暂停模式时，电压调节器消耗的功率较小。 当处于待机模式时，电压调节器消耗更少的功率。

公开(公告)号：US07466786B2

公开(公告)日：2008-12-16

申请号：US11161955

申请日：2005-08-24

Applicant: Wen-Hwa Chou ,  Yu-Kuo Chen ,  Kuo-Jen Kuo

Inventor： Wen-Hwa Chou ,  Yu-Kuo Chen ,  Kuo-Jen Kuo

IPC: H03D3/24

CPC classification number: H03K5/00006 ,  H03L7/06

Abstract: A rational number frequency multiplier circuit and a method for generating rational number multiple frequency are disclosed. The circuit receives a plurality of input signals having the same frequency and different phase, and outputs at least one multiple frequency signal. The rational number frequency multiplier circuit includes a frequency divider module, for receiving and dividing the input signals to output frequency-divided signals having the same frequency and different phase; a first phase synthesis module and a second phase synthesis module for receiving and synthesizing the frequency-divided and input signals respectively into a plurality of first pulse period signals and second pulse period signals; and an adder for receiving and combining the first pulse period signals and the second pulse period signals into the multiple frequency signal according to the desired multiplication of the frequency.

Abstract translation: 公开了一种有理数倍频电路和一种产生有理数倍频率的方法。 电路接收具有相同频率和不同相位的多个输入信号，并输出至少一个多频信号。 有理数倍频电路包括分频器模块，用于接收和分频输入信号以输出具有相同频率和不同相位的分频信号; 第一相位合成模块和第二相位合成模块，用于分别将分频和输入信号分别接收并合成多个第一脉冲周期信号和第二脉冲周期信号; 以及加法器，用于根据频率的期望乘法接收并组合第一脉冲周期信号和第二脉冲周期信号到多频信号中。