发明授权
US07470972B2 Complementary metal oxide semiconductor integrated circuit using uniaxial compressive stress and biaxial compressive stress 有权
使用单轴压应力和双轴压应力的互补金属氧化物半导体集成电路

Complementary metal oxide semiconductor integrated circuit using uniaxial compressive stress and biaxial compressive stress
摘要:
A transistor may be formed of different layers of silicon germanium, a lowest layer having a graded germanium concentration and upper layers having constant germanium concentrations such that the lowest layer is of the form Si1-xGex. The highest layer may be of the form Si1-yGey on the PMOS side. A source and drain may be formed of epitaxial silicon germanium of the form Si1-zGez on the PMOS side. In some embodiments, x is greater than y and z is greater than x in the PMOS device. Thus, a PMOS device may be formed with both uniaxial compressive stress in the channel direction and in-plane biaxial compressive stress. This combination of stress may result in higher mobility and increased device performance in some cases.
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