发明授权
- 专利标题： Split game memory cell method
- 专利标题（中）： 分割游戏记忆单元法
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申请号： US11669307申请日： 2007-01-31
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公开(公告)号： US07479429B2公开(公告)日： 2009-01-20
- 发明人: Rajesh Rao , Ramachandran Muralidhar , Leo Mathew
- 申请人： Rajesh Rao , Ramachandran Muralidhar , Leo Mathew
- 申请人地址： US TX Austin
- 专利权人： Freescale Semiconductor, Inc.
- 当前专利权人： Freescale Semiconductor, Inc.
- 当前专利权人地址： US TX Austin
- 代理商 Daniel D. Hill; James L. Clingan, Jr.
- 主分类号： H01L21/336
- IPC分类号： H01L21/336
摘要：
A multi-bit split-gate memory device is formed over a substrate. A storage layer is formed over the substrate. A first conductive layer is formed over the storage layer. A thickness of a portion of the conductive layer is removed to leave a pillar of the conductive layer and an area of reduced thickness of the conductive layer. A first sidewall spacer is formed adjacent to the pillar to cover a first portion and a second portion of the area of reduced thickness of the conductive layer. The pillar is replaced with a select gate. The area of reduced thickness is selectively removed to leave the first and second portions as control gates.
公开/授权文献
- US20080182375A1 SPLIT GATE MEMORY CELL METHOD 公开/授权日：2008-07-31