发明授权
- 专利标题： Method and apparatus for reducing the number of test designs for device testing
- 专利标题（中）： 减少设备测试设计数量的方法和设备
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申请号： US10892603申请日： 2004-07-16
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公开(公告)号： US07480842B1公开(公告)日： 2009-01-20
- 发明人: Jay T. Young , Ian L. McEwen , Reto Stamm
- 申请人： Jay T. Young , Ian L. McEwen , Reto Stamm
- 申请人地址： US CA San Jose
- 专利权人： Xilinx, Inc.
- 当前专利权人： Xilinx, Inc.
- 当前专利权人地址： US CA San Jose
- 代理商 Timothy W. Markison; Robert M. Brush
- 主分类号： G01R31/28
- IPC分类号： G01R31/28 ; G06F11/00
摘要：
The present invention includes an apparatus and method to optimize a set of test designs to obtain complete coverage while reducing bit stream size for programmable fabric. Test designs are selected that do not result in lost coverage. The method selects a set of test designs, removes the set of test designs, and then determines if coverage is lost. If coverage is lost, the method creates a new set of test designs to test the lost coverage. If the new set of test designs is smaller than the removed set, the new set of test designs is added to the test design suite; otherwise the removed test designs are added back to the test design suite. The decision to add the new test designs or removed test designs is based on a number of criteria including evaluating the number of uniquely tested resources in each test design.
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