Invention Grant
- Patent Title: Method of fabricating multi-fin field effect transistor
- Patent Title (中): 制造多鳍场效应晶体管的方法
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Application No.: US11309376Application Date: 2006-08-02
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Publication No.: US07510955B2Publication Date: 2009-03-31
- Inventor: Hsiao-Che Wu
- Applicant: Hsiao-Che Wu
- Applicant Address: TW Hsinchu
- Assignee: ProMOS Technologies Inc.
- Current Assignee: ProMOS Technologies Inc.
- Current Assignee Address: TW Hsinchu
- Agency: Jianq Chyun IP Office
- Priority: TW95119811A 20060605
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A multi-fin field effect transistor includes a substrate, an oxide layer, a conductive layer, a gate oxide layer, and a doped region is provided. The substrate is surrounded by a trench, and there are at least two fin-type silicon layers formed in the substrate in a region prepared to form a gate thereon. The oxide layer is disposed in the trench and the top surface of the oxide layer is lower than that of the fin-type silicon layers. The conductive layer is disposed in the region prepared to form a gate. The top surface of the conductive layer is higher than that of the fin-type silicon layers. The gate oxide layer is disposed between the conductive layer and the fin-type silicon layers and disposed between the conductive layer and the substrate. The doped region is disposed in the substrate on both sides of the conductive layer.
Public/Granted literature
- US20070278595A1 MULTI-FIN FIELD EFFECT TRANSISTOR AND FABRICATING METHOD THEREOF Public/Granted day:2007-12-06
Information query
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