Invention Grant
US07518917B2 Nonvolatile memory utilizing MIS memory transistors capable of multiple store operations
有权
使用能够进行多个存储操作的MIS存储器晶体管的非易失性存储器
- Patent Title: Nonvolatile memory utilizing MIS memory transistors capable of multiple store operations
- Patent Title (中): 使用能够进行多个存储操作的MIS存储器晶体管的非易失性存储器
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Application No.: US11775951Application Date: 2007-07-11
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Publication No.: US07518917B2Publication Date: 2009-04-14
- Inventor: Kenji Noda , Takashi Kikuchi
- Applicant: Kenji Noda , Takashi Kikuchi
- Applicant Address: JP Fukuoka
- Assignee: NScore Inc.
- Current Assignee: NScore Inc.
- Current Assignee Address: JP Fukuoka
- Agency: Ladas & Parry LLP
- Main IPC: G11C11/34
- IPC: G11C11/34

Abstract:
A nonvolatile semiconductor memory device includes a latch configured to store data, a plurality of word lines, a driver configured to activate one of the plurality of word lines, and a plurality of nonvolatile memory cells coupled to the respective word lines, each of the nonvolatile memory cells coupled to the latch so as to exchange stored data with the latch upon activation of a corresponding one of the word lines, each of the nonvolatile memory cells including two MIS transistors and configured to store data as an irreversible change of transistor characteristics occurring in one of the two MIS transistors, wherein the driver includes at least one nonvolatile memory cell storing count data responsive to a number of times storing of data has been performed with respect to the plurality of nonvolatile memory cells, and is configured to activate one of the word lines indicated by the count data.
Public/Granted literature
- US20090016105A1 NONVOLATILE MEMORY UTILIZING MIS MEMORY TRANSISTORS CAPABLE OF MULTIPLE STORE OPERATIONS Public/Granted day:2009-01-15
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