发明授权
- 专利标题: Methods of fabricating a semiconductor device
- 专利标题(中): 制造半导体器件的方法
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申请号: US11429071申请日: 2006-05-08
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公开(公告)号: US07540970B2公开(公告)日: 2009-06-02
- 发明人: Cha-Won Koh , Sang-Gyun Woo , Jeong-Lim Nam , Kyeong-Koo Chi , Seok-Hwan Oh , Gi-Sung Yeo , Seung-Pil Chung , Heung-Sik Park
- 申请人: Cha-Won Koh , Sang-Gyun Woo , Jeong-Lim Nam , Kyeong-Koo Chi , Seok-Hwan Oh , Gi-Sung Yeo , Seung-Pil Chung , Heung-Sik Park
- 申请人地址: KR Gyeonggi-do
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KR Gyeonggi-do
- 代理机构: Harness, Dickey & Pierce, P.L.C.
- 优先权: KR10-2005-0067292 20050725
- 主分类号: C03C15/00
- IPC分类号: C03C15/00
摘要:
Methods of fabricating a semiconductor device are provided. Methods of forming a finer pattern of a semiconductor device using a buffer layer for retarding, or preventing, bridge formation between patterns in the formation of a finer pattern below resolution limits of a photolithography process by double patterning are also provided. A first hard mask layer and/or a second hard mask layer may be formed on a layer of a substrate to be etched. A first etch mask pattern of a first pitch may be formed on the second hard mask layer. After a buffer layer is formed on the overall surface of the substrate, a second etch mask pattern of a second pitch may be formed thereon in a region between the first etch mask pattern. The buffer layer may be anisotropically etched using the second etch mask pattern as an etch mask, forming a buffer layer pattern. The second hard mask layer may be anisotropically etched using the first etch mask pattern and/or the buffer layer pattern as etch masks, forming a second hard mask pattern. The first hard mask layer may be anisotropically etched using the second hard mask pattern as an etch mask, forming a first hard mask pattern. The etched layer may be anisotropically etched using the first hard mask pattern as an etch mask.
公开/授权文献
- US20070020565A1 Methods of fabricating a semiconductor device 公开/授权日:2007-01-25
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