Invention Grant
- Patent Title: Method of forming solder bump with reduced surface defects
- Patent Title (中): 形成具有减少的表面缺陷的焊料凸块的方法
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Application No.: US11529377Application Date: 2006-09-29
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Publication No.: US07553751B2Publication Date: 2009-06-30
- Inventor: Se-Young Jeong , Jin-Hak Choi , Nam-Seog Kim , Kang-Wook Lee
- Applicant: Se-Young Jeong , Jin-Hak Choi , Nam-Seog Kim , Kang-Wook Lee
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR2003-58003 20030821
- Main IPC: H01L21/44
- IPC: H01L21/44

Abstract:
A method of forming a solder bump may involve forming a first photoresist pattern on a wafer having a pad. The first photoresist pattern may have an opening that exposes a portion of the pad. A first under bump metallurgy (UBM) layer may be formed on the pad, and a second UBM layer may be formed on the first photoresist pattern. A second photoresist pattern may be formed that exposes the first UBM layer. A solder bump may be formed in the opening. The second photoresist pattern and the first photoresist pattern may be removed using a stripper, thereby removing the second UBM layer by a lift-off method.
Public/Granted literature
- US20070020913A1 Method of forming solder bump with reduced surface defects Public/Granted day:2007-01-25
Information query
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