发明授权
- 专利标题： Synchronizing a translation lookaside buffer to an extended paging table
- 专利标题（中）： 将翻译后备缓冲区同步到扩展分页表
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申请号： US11504964申请日： 2006-08-15
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公开(公告)号： US07555628B2公开(公告)日： 2009-06-30
- 发明人: Steven M. Bennett , Andrew V. Anderson , Gilbert Neiger , Richard Uhlig , Dion Rodgers , Rajesh Madukkarumukumana Sankaran , Camron Rust , Sebastian Schoenberg
- 申请人： Steven M. Bennett , Andrew V. Anderson , Gilbert Neiger , Richard Uhlig , Dion Rodgers , Rajesh Madukkarumukumana Sankaran , Camron Rust , Sebastian Schoenberg
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Caven & Aghevli LLC
- 主分类号： G06F12/10
- IPC分类号： G06F12/10
摘要：
A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system.
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