发明授权
US07571432B2 Compiler apparatus for optimizing high-level language programs using directives
有权
用于使用指令优化高级语言程序的编译器设备
- 专利标题: Compiler apparatus for optimizing high-level language programs using directives
- 专利标题(中): 用于使用指令优化高级语言程序的编译器设备
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申请号: US10944831申请日: 2004-09-21
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公开(公告)号: US07571432B2公开(公告)日: 2009-08-04
- 发明人: Taketo Heishi , Hajime Ogawa , Yasuhiro Yamamoto , Kyoko Hattori , Shohei Michimoto , Kenji Hattori , Hirotetsu Tomita , Teruo Kawabata , Kiyoshi Nakashima
- 申请人: Taketo Heishi , Hajime Ogawa , Yasuhiro Yamamoto , Kyoko Hattori , Shohei Michimoto , Kenji Hattori , Hirotetsu Tomita , Teruo Kawabata , Kiyoshi Nakashima
- 申请人地址: JP Osaka
- 专利权人: Panasonic Corporation
- 当前专利权人: Panasonic Corporation
- 当前专利权人地址: JP Osaka
- 代理机构: Wenderoth, Lind & Ponack, L.L.P.
- 优先权: JP2003-357323 20031017
- 主分类号: G06F9/45
- IPC分类号: G06F9/45
摘要:
A compiler 58, which is a compiler that realizes program development in a fewer man hours, translates a source program 72 written in a high-level language into a machine language program. This compiler 58 is comprised of: a directive obtainment unit that obtains a directive that a machine language program to be generated should be optimized; a parser unit 76 that parses the source program 72; an intermediate code conversion unit 78 that converts the source program 72 into intermediate codes based on a result of the parsing performed by the parser unit 76; an optimization unit 68 that optimizes the intermediate codes according to the directive; and a code generation unit 90 that converts the intermediate codes into the machine language program. The above directive is a directive to optimize the machine language program targeted at a processor that uses a cache memory.
公开/授权文献
- US20050086653A1 Compiler apparatus 公开/授权日:2005-04-21
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