发明授权
- 专利标题： Method for manufacturing semiconductor device having solder layer
- 专利标题（中）： 具有焊料层的半导体器件的制造方法
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申请号： US11108908申请日： 2005-04-19
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公开(公告)号： US07601625B2公开(公告)日： 2009-10-13
- 发明人: Chikage Noritake , Yoshitsugu Sakamoto , Akira Tanahashi , Hideki Okada , Tomomasa Yoshida
- 申请人： Chikage Noritake , Yoshitsugu Sakamoto , Akira Tanahashi , Hideki Okada , Tomomasa Yoshida
- 申请人地址： JP Kariya JP Aichi-ken
- 专利权人： DENSO CORPORATION,Toyota Jidosha Kabushiki Kaisha
- 当前专利权人： DENSO CORPORATION,Toyota Jidosha Kabushiki Kaisha
- 当前专利权人地址： JP Kariya JP Aichi-ken
- 代理机构： Posz Law Group, PLC
- 优先权： JP2004-124222 20040420
- 主分类号： H01L21/44
- IPC分类号： H01L21/44
摘要：
A method for manufacturing a semiconductor device having a solder layer includes the steps of: grinding a mounting surface of a semiconductor chip; etching the mounting surface of the chip; forming an electrode on the mounting surface of the chip; assembling the chip, the solder layer and a base in this order; and heating the chip, the solder layer and the base to be equal to or higher than a solidus temperature of the solder layer so that the solder layer is reflowed for soldering the chip on the base.
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