Semiconductor structure comprising field effect transistors with stressed channel regions and method of forming the same

Invention Grant

US07608499B2 Semiconductor structure comprising field effect transistors with stressed channel regions and method of forming the same 有权

Title translation: 包括具有应力沟道区域的场效应晶体管的半导体结构及其形成方法

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Patent Title: Semiconductor structure comprising field effect transistors with stressed channel regions and method of forming the same
Patent Title (中): 包括具有应力沟道区域的场效应晶体管的半导体结构及其形成方法
Application No.: US11685847

Application Date: 2007-03-14
Publication No.: US07608499B2

Publication Date: 2009-10-27
Inventor: Karla Romero , Sven Beyer , Jan Hoentschel , Rolf Stephan
Applicant: Karla Romero , Sven Beyer , Jan Hoentschel , Rolf Stephan
Applicant Address: US TX Austin
Assignee: Advanced Micro Devices, Inc.
Current Assignee: Advanced Micro Devices, Inc.
Current Assignee Address: US TX Austin
Agency: Williams, Morgan & Amerson, P.C.
Priority: DE102006035666 20060731
Main IPC: H01L21/8238
IPC: H01L21/8238

Semiconductor structure comprising field effect transistors with stressed channel regions and method of forming the same

Abstract:

A method of forming a semiconductor structure comprises providing a semiconductor substrate comprising a first transistor element and a second transistor element. Each of the first transistor element and the second transistor element comprises a gate electrode. A stressed material layer is deposited over the first transistor element and the second transistor element. The stressed material layer is processed to form from the stressed material layer sidewall spacers adjacent the gate electrode of the second transistor element and a hard mask covering the first transistor element. A pair of cavities is formed adjacent the gate electrode of the second transistor element. A pair of stress-creating elements is formed in the cavities and the hard mask is at least partially removed.

Abstract(Chinese):

形成半导体结构的方法包括提供包括第一晶体管元件和第二晶体管元件的半导体衬底。第一晶体管元件和第二晶体管元件中的每一个包括栅电极。在第一晶体管元件和第二晶体管元件上沉积应力材料层。被施加的材料层被加工成从与第二晶体管元件的栅电极相邻的应力材料层侧壁间隔和覆盖第一晶体管元件的硬掩模形成。在第二晶体管元件的栅电极附近形成一对空腔。在空腔中形成一对应力产生元件，并且至少部分地去除硬掩模。

Public/Granted literature

US20080023771A1 SEMICONDUCTOR STRUCTURE COMPRISING FIELD EFFECT TRANSISTORS WITH STRESSED CHANNEL REGIONS AND METHOD OF FORMING THE SAME Public/Granted day:2008-01-31

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8238	........互补场效应晶体管，例如CMOS