Semiconductor structure comprising field effect transistors with stressed channel regions and method of forming the same
    1.
    发明授权
    Semiconductor structure comprising field effect transistors with stressed channel regions and method of forming the same 有权
    包括具有应力沟道区域的场效应晶体管的半导体结构及其形成方法

    公开(公告)号:US07608499B2

    公开(公告)日:2009-10-27

    申请号:US11685847

    申请日:2007-03-14

    IPC分类号: H01L21/8238

    摘要: A method of forming a semiconductor structure comprises providing a semiconductor substrate comprising a first transistor element and a second transistor element. Each of the first transistor element and the second transistor element comprises a gate electrode. A stressed material layer is deposited over the first transistor element and the second transistor element. The stressed material layer is processed to form from the stressed material layer sidewall spacers adjacent the gate electrode of the second transistor element and a hard mask covering the first transistor element. A pair of cavities is formed adjacent the gate electrode of the second transistor element. A pair of stress-creating elements is formed in the cavities and the hard mask is at least partially removed.

    摘要翻译: 形成半导体结构的方法包括提供包括第一晶体管元件和第二晶体管元件的半导体衬底。 第一晶体管元件和第二晶体管元件中的每一个包括栅电极。 在第一晶体管元件和第二晶体管元件上沉积应力材料层。 被施加的材料层被加工成从与第二晶体管元件的栅电极相邻的应力材料层侧壁间隔和覆盖第一晶体管元件的硬掩模形成。 在第二晶体管元件的栅电极附近形成一对空腔。 在空腔中形成一对应力产生元件,并且至少部分地去除硬掩模。

    SEMICONDUCTOR STRUCTURE COMPRISING FIELD EFFECT TRANSISTORS WITH STRESSED CHANNEL REGIONS AND METHOD OF FORMING THE SAME
    2.
    发明申请
    SEMICONDUCTOR STRUCTURE COMPRISING FIELD EFFECT TRANSISTORS WITH STRESSED CHANNEL REGIONS AND METHOD OF FORMING THE SAME 有权
    包含具有应力通道区的场效应晶体管的半导体结构及其形成方法

    公开(公告)号:US20080023771A1

    公开(公告)日:2008-01-31

    申请号:US11685847

    申请日:2007-03-14

    IPC分类号: H01L29/76 H01L21/8238

    摘要: A method of forming a semiconductor structure comprises providing a semiconductor substrate comprising a first transistor element and a second transistor element. Each of the first transistor element and the second transistor element comprises a gate electrode. A stressed material layer is deposited over the first transistor element and the second transistor element. The stressed material layer is processed to form from the stressed material layer sidewall spacers adjacent the gate electrode of the second transistor element and a hard mask covering the first transistor element. A pair of cavities is formed adjacent the gate electrode of the second transistor element. A pair of stress-creating elements is formed in the cavities and the hard mask is at least partially removed.

    摘要翻译: 形成半导体结构的方法包括提供包括第一晶体管元件和第二晶体管元件的半导体衬底。 第一晶体管元件和第二晶体管元件中的每一个包括栅电极。 在第一晶体管元件和第二晶体管元件上沉积应力材料层。 被施加的材料层被加工成从与第二晶体管元件的栅电极相邻的应力材料层侧壁间隔和覆盖第一晶体管元件的硬掩模形成。 在第二晶体管元件的栅电极附近形成一对空腔。 在空腔中形成一对应力产生元件,并且至少部分地去除硬掩模。

    Field effect transistor and method of forming a field effect transistor
    5.
    发明授权
    Field effect transistor and method of forming a field effect transistor 有权
    场效应晶体管和形成场效应晶体管的方法

    公开(公告)号:US07629211B2

    公开(公告)日:2009-12-08

    申请号:US11684211

    申请日:2007-03-09

    IPC分类号: H01L21/331 H01L21/8234

    摘要: A method of forming a field effect transistor comprises providing a semiconductor substrate, a gate electrode being formed over the semiconductor substrate. At least one cavity is formed adjacent the gate electrode. A strain-creating element is formed in the at least one cavity. The strain-creating element comprises a compound material comprising a first chemical element and a second chemical element. A first concentration ratio between a concentration of the first chemical element in a first portion of the strain-creating element and a concentration of the second chemical element in the first portion of the strain-creating element is different from a second concentration ratio between a concentration of the first chemical element in a second portion of the strain-creating element and a concentration of the second chemical element in the second strain-creating element.

    摘要翻译: 形成场效应晶体管的方法包括提供半导体衬底,栅电极形成在半导体衬底上。 在栅电极附近形成至少一个空腔。 应变产生元件形成在至少一个空腔中。 应变产生元件包括包含第一化学元素和第二化学元素的复合材料。 应变产生元件的第一部分中的第一化学元素的浓度与应变产生元件的第一部分中的第二化学元素的浓度之间的第一浓度比不同于第二浓度比, 的应变产生元件的第二部分中的第一化学元素和第二应变产生元件中的第二化学元素的浓度。

    FIELD EFFECT TRANSISTOR AND METHOD OF FORMING A FIELD EFFECT TRANSISTOR
    7.
    发明申请
    FIELD EFFECT TRANSISTOR AND METHOD OF FORMING A FIELD EFFECT TRANSISTOR 有权
    场效应晶体管和形成场效应晶体管的方法

    公开(公告)号:US20080026531A1

    公开(公告)日:2008-01-31

    申请号:US11684211

    申请日:2007-03-09

    IPC分类号: H01L21/8234 H01L27/088

    摘要: A method of forming a field effect transistor comprises providing a semiconductor substrate, a gate electrode being formed over the semiconductor substrate. At least one cavity is formed adjacent the gate electrode. A strain-creating element is formed in the at least one cavity. The strain-creating element comprises a compound material comprising a first chemical element and a second chemical element. A first concentration ratio between a concentration of the first chemical element in a first portion of the strain-creating element and a concentration of the second chemical element in the first portion of the strain-creating element is different from a second concentration ratio between a concentration of the first chemical element in a second portion of the strain-creating element and a concentration of the second chemical element in the second strain-creating element.

    摘要翻译: 形成场效应晶体管的方法包括提供半导体衬底,栅电极形成在半导体衬底上。 在栅电极附近形成至少一个空腔。 应变产生元件形成在至少一个空腔中。 应变产生元件包括包含第一化学元素和第二化学元素的复合材料。 应变产生元件的第一部分中的第一化学元素的浓度与应变产生元件的第一部分中的第二化学元素的浓度之间的第一浓度比不同于第二浓度比, 的应变产生元件的第二部分中的第一化学元素和第二应变产生元件中的第二化学元素的浓度。

    FORMATION OF SILICIDED SURFACES FOR SILICON/CARBON SOURCE/DRAIN REGIONS
    8.
    发明申请
    FORMATION OF SILICIDED SURFACES FOR SILICON/CARBON SOURCE/DRAIN REGIONS 审中-公开
    形成硅/碳源/排水区的硅表面

    公开(公告)号:US20070200176A1

    公开(公告)日:2007-08-30

    申请号:US11550631

    申请日:2006-10-18

    IPC分类号: H01L27/12

    摘要: Formation of a silicide layer on the source/drain regions of a field effect transistor with a channel under tensile strain is disclosed. The strain is originated by the silicon/carbon source/drain regions which are grown by CVD deposition. In order to form the silicide layer, a silicon cap layer is deposited in situ by CVD. The silicon cap layer is then employed to form a silicide layer made of a silicon/cobalt compound. This method allows the formation of a silicide cobalt layer in silicon/carbon source/drain regions, which was until the present time not possible.

    摘要翻译: 公开了在具有拉伸应变的通道的场效应晶体管的源/漏区上形成硅化物层。 该菌株由通过CVD沉积生长的硅/碳源/漏区产生。 为了形成硅化物层,通过CVD原位沉积硅覆盖层。 然后使用硅覆盖层形成由硅/钴化合物制成的硅化物层。 该方法允许在硅/碳源/漏区中形成硅化钴钴层,直到目前为止不可能。

    Semiconductor device comprising replacement gate electrode structures and self-aligned contact elements formed by a late contact fill
    10.
    发明授权
    Semiconductor device comprising replacement gate electrode structures and self-aligned contact elements formed by a late contact fill 有权
    半导体器件包括替代栅电极结构和由后接触填充形成的自对准接触元件

    公开(公告)号:US08846513B2

    公开(公告)日:2014-09-30

    申请号:US13241915

    申请日:2011-09-23

    摘要: When forming self-aligned contact elements in sophisticated semiconductor devices in which high-k metal gate electrode structures are to be provided on the basis of a replacement gate approach, the self-aligned contact openings are filled with an appropriate fill material, such as polysilicon, while the gate electrode structures are provided on the basis of a placeholder material that can be removed with high selectivity with respect to the sacrificial fill material. In this manner, the high-k metal gate electrode structures may be completed prior to actually filling the contact openings with an appropriate contact material after the removal of the sacrificial fill material. In one illustrative embodiment, the placeholder material of the gate electrode structures is provided in the form of a silicon/germanium material.

    摘要翻译: 当在基于更换栅极方法的高k金属栅电极结构的复杂半导体器件中形成自对准接触元件时,自对准接触开口用适当的填充材料填充,例如多晶硅 而栅电极结构基于可相对于牺牲填充材料以高选择性去除的占位符材料提供。 以这种方式,高k金属栅电极结构可以在去除牺牲填充材料之前用适当的接触材料实际填充接触开口之前完成。 在一个说明性实施例中,栅电极结构的占位符材料以硅/锗材料的形式提供。