发明授权
US07610537B2 Method and apparatus for testing multi-core microprocessors 失效
用于测试多核微处理器的方法和装置

Method and apparatus for testing multi-core microprocessors
摘要:
A computer implemented method, data processing system, and computer usable code are provided for testing multi-core microprocessors. A test process initiates testing on communication bus interfaces associated with a set of processor cores on the multiprocessor in which the communication bus interfaces are disabled and wherein the testing uses a set of isolation test sequences to obtain results. The process identifies a set of functional processor cores in the set of processor cores based upon the results. The process also initiates a ramp logic built-in self-test to test a ramp associated with a functional processor core in the set of functional processor cores, wherein the ramp logic built-in self-test determines if the communication bus interface associated with functional processor core in the set of functional processor cores is functional.
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