Invention Grant
- Patent Title: Method for fabricating reverse-staggered thin film transistor
- Patent Title (中): 逆交错薄膜晶体管的制造方法
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Application No.: US11609374Application Date: 2006-12-12
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Publication No.: US07662681B2Publication Date: 2010-02-16
- Inventor: Jin Jang , Jun-Hyuk Cheon
- Applicant: Jin Jang , Jun-Hyuk Cheon
- Applicant Address: KR Seoul
- Assignee: Kyunghee University Industrial & Academic Collaboration Foundation
- Current Assignee: Kyunghee University Industrial & Academic Collaboration Foundation
- Current Assignee Address: KR Seoul
- Agency: Locke Lord Bissell & Liddell LLP
- Priority: KR10-2005-0123166 20051214
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/84

Abstract:
Disclosed herein is a method for fabricating a reverse-staggered polycrystalline silicon thin film transistor, and more specifically a method for fabricating a reverse-staggered polycrystalline silicon thin film transistor wherein a phosphosilicate-spin-on-glass (P-SOG) is used for a gate insulating film. The method comprises the steps of: forming a buffer layer on an insulating substrate; forming a gate metal pattern on the buffer layer; forming a planarized gate insulating film on the gate metal pattern; depositing an amorphous silicon layer on the gate insulating film; crystallizing the amorphous silicon layer into a polycrystalline silicon layer; forming a n+ or p+ layer on the polycrystalline silicon layer; forming a source/drain metal layer on the n+ or p+ layer; and forming a passivation layer on the source/drain metal layer.
Public/Granted literature
- US20070134856A1 METHOD FOR FABRICATING REVERSE-STAGGERED THIN FILM TRANSISTOR Public/Granted day:2007-06-14
Information query
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