发明授权
US07670963B2 Single-wafer process for fabricating a nonvolatile charge trap memory device
有权
用于制造非易失性电荷陷阱存储器件的单晶片工艺
- 专利标题: Single-wafer process for fabricating a nonvolatile charge trap memory device
- 专利标题(中): 用于制造非易失性电荷陷阱存储器件的单晶片工艺
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申请号: US11904513申请日: 2007-09-26
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公开(公告)号: US07670963B2公开(公告)日: 2010-03-02
- 发明人: Krishnaswamy Ramkumar , Sagy Levy
- 申请人: Krishnaswamy Ramkumar , Sagy Levy
- 申请人地址: US CA San Jose
- 专利权人: Cypress Semiconductor Corportion
- 当前专利权人: Cypress Semiconductor Corportion
- 当前专利权人地址: US CA San Jose
- 主分类号: H01L21/469
- IPC分类号: H01L21/469
摘要:
A method for fabricating a nonvolatile charge trap memory device is described. The method includes first forming a tunnel dielectric layer on a substrate in a first process chamber of a single-wafer cluster tool. A charge-trapping layer is then formed on the tunnel dielectric layer in a second process chamber of the single-wafer cluster tool. A top dielectric layer is then formed on the charge-trapping layer in the second or in a third process chamber of the single-wafer cluster tool.
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