发明授权
- 专利标题： Methods of forming an integrated circuit package
- 专利标题（中）： 形成集成电路封装的方法
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申请号： US11218998申请日： 2005-09-01
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公开(公告)号： US07674652B2公开(公告)日： 2010-03-09
- 发明人: Warren M. Farnworth , Jerry M. Brooks
- 申请人： Warren M. Farnworth , Jerry M. Brooks
- 申请人地址： US ID Boise
- 专利权人： Micron Technology, Inc.
- 当前专利权人： Micron Technology, Inc.
- 当前专利权人地址： US ID Boise
- 代理机构： Fletcher Yoder PC
- 主分类号： H01L21/50
- IPC分类号： H01L21/50 ; H01L21/48 ; H01L21/44
摘要：
A technique for making an integrated circuit package. Specifically, a stacked memory device is provided with minimal interconnects. Memory die are stacked on top of each other and electrically coupled to a substrate. Thru vias are provided in the substrate and/or memory die to facilitate the electrical connects without necessitating a complex interconnect technology between each of the interfaces. Wire bonds are used to complete the circuit package.
公开/授权文献
- US20060014317A1 Integrated circuit package having reduced interconnects 公开/授权日：2006-01-19