发明授权
US07696556B2 Nonvolatile memory devices including high-voltage MOS transistors with floated drain-side auxiliary gates and methods of fabricating the same
有权
包括具有浮置漏极侧辅助栅极的高压MOS晶体管的非易失性存储器件及其制造方法
- 专利标题: Nonvolatile memory devices including high-voltage MOS transistors with floated drain-side auxiliary gates and methods of fabricating the same
- 专利标题(中): 包括具有浮置漏极侧辅助栅极的高压MOS晶体管的非易失性存储器件及其制造方法
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申请号: US11518724申请日: 2006-09-11
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公开(公告)号: US07696556B2公开(公告)日: 2010-04-13
- 发明人: Sung-Hoi Hur , Young-Min Park , Sang-Bin Song , Min-Cheol Park , Ji-Hwon Lee , Su-Youn Yi , Jang-Min Yoo
- 申请人: Sung-Hoi Hur , Young-Min Park , Sang-Bin Song , Min-Cheol Park , Ji-Hwon Lee , Su-Youn Yi , Jang-Min Yoo
- 申请人地址: KR
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KR
- 代理机构: Mills & Onello, LLP
- 优先权: KR10-2005-0088335 20050922
- 主分类号: H01L29/788
- IPC分类号: H01L29/788 ; H01L21/8238
摘要:
High-voltage MOS transistors with a floated drain-side auxiliary gate are provided. The high-voltage MOS transistors include a source region and a drain region provided in a semiconductor substrate. A main gate electrode is disposed over the semiconductor substrate between the drain region and the source region. A lower drain-side auxiliary gate and an upper drain-side auxiliary gate are sequentially stacked over the semiconductor substrate between the main gate electrode and the drain region. The lower drain-side auxiliary gate is electrically insulated from the semiconductor substrate, the main gate electrode and the upper drain-side auxiliary gate. Methods of fabricating the high-voltage MOS transistors are also provided.
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