发明授权
US07700420B2 Integrated circuit with different channel materials for P and N channel transistors and method therefor
有权
用于P和N沟道晶体管的不同沟道材料的集成电路及其方法
- 专利标题： Integrated circuit with different channel materials for P and N channel transistors and method therefor
- 专利标题（中）： 用于P和N沟道晶体管的不同沟道材料的集成电路及其方法
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申请号： US11402395申请日： 2006-04-12
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公开(公告)号： US07700420B2公开(公告)日： 2010-04-20
- 发明人: Voon-Yew Thean , Bich-Yen Nguyen , Mariam G. Sadaka , Victor H. Vartanian , Ted R. White
- 申请人： Voon-Yew Thean , Bich-Yen Nguyen , Mariam G. Sadaka , Victor H. Vartanian , Ted R. White
- 申请人地址： US TX Austin
- 专利权人： Freescale Semiconductor, Inc.
- 当前专利权人： Freescale Semiconductor, Inc.
- 当前专利权人地址： US TX Austin
- 代理商 James L. Clingan, Jr.; Joanna G. Chiu
- 主分类号： H01L21/00
- IPC分类号： H01L21/00 ; H01L21/84
摘要：
A substrate includes a first region and a second region. The first region comprises a III-nitride layer, and the second region comprises a first semiconductor layer. A first transistor (such as an n-type transistor) is formed in and on the III-nitride layer, and a second transistor (such as a p-type transistor) is formed in and on the first semiconductor layer. The III-nitride layer may be indium nitride. In the first region, the substrate may include a second semiconductor layer, a graded transition layer over the second semiconductor layer, and a buffer layer over the transition layer, where the III-nitride layer is over the buffer layer. In the second region, the substrate may include the second semiconductor layer and an insulating layer over the second semiconductor layer, where the first semiconductor layer is over the insulating layer.
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