A technology providing an improvement in the durability in the condition of changing the temperature, while ensuring characteristics such as the applicability to applications utilizing larger electric current, lower resistance and the like can be achieved. A semiconductor device 100 includes a ceramic multiple-layered interconnect substrate 120, a silicon chip 110 that is flip-bonded to a chip-carrying region of the ceramic multiple-layered interconnect substrate 120, and an external connecting bumps 161 and an external connecting bumps 163, which are provided in the side that the silicon chip 110 of the ceramic multiple-layered interconnect substrate 120 is carried. The silicon chip 110 includes a front surface electrode and a back surface electrode. The ceramic multiple-layered interconnect substrate 120 includes an interconnect layer composed of a conductive material, and the interconnect layer composes a multiple-layered interconnect layer provided on a front surface and in an interior of the ceramic multiple-layered interconnect substrate 120. The front surface electrode of the silicon chip is electrically connected to the external connecting bump 161 and the external connecting bump 163 through the multiple-layered interconnects in the multiple-layered interconnect layer.