发明授权
US07737723B1 Transparent field reconfiguration for programmable logic devices 有权
可编程逻辑器件的透明场重新配置

Transparent field reconfiguration for programmable logic devices
摘要:
In accordance with an embodiment of the present invention, a programmable logic device (PLD, such as a field programmable gate array (FPGA)) includes a plurality of input/output blocks adapted to precondition registers within the programmable logic device with desired signal values prior to release of control of the input/output blocks to user-defined logic provided by a reconfiguration.
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