发明授权
- 专利标题: Method for fabricating Schottky barrier tunnel transistor
- 专利标题(中): 制造肖特基势垒隧道晶体管的方法
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申请号: US11930902申请日: 2007-10-31
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公开(公告)号: US07745316B2公开(公告)日: 2010-06-29
- 发明人: Yark-Yeon Kim , Seong-Jae Lee , Moon-Gyu Jang , Tae-Youb Kim , Chel-Jong Choi , Myung-Sim Jun , Byoung-Chul Park
- 申请人: Yark-Yeon Kim , Seong-Jae Lee , Moon-Gyu Jang , Tae-Youb Kim , Chel-Jong Choi , Myung-Sim Jun , Byoung-Chul Park
- 申请人地址: KR Daejon
- 专利权人: Electronics and Telecommunications Research Institute
- 当前专利权人: Electronics and Telecommunications Research Institute
- 当前专利权人地址: KR Daejon
- 代理机构: Rabin & Berdo, P.C.
- 优先权: KR10-2006-0120565 20061201
- 主分类号: H01L21/28
- IPC分类号: H01L21/28 ; H01L21/44
摘要:
Provided is a method for fabricating a Schottky barrier tunnel transistor (SBTT) that can fundamentally prevent the generation of a gate leakage current caused by damage of spacers formed on both sidewalls of a gate electrode. The method for fabricating a Schottky barrier tunnel transistor, which includes: a) forming a silicon pattern and a sacrificial pattern on a buried oxide layer supported by a support substrate; b) forming a source/drain region on the buried oxide layer exposed on both sides of the silicon pattern, the source/drain region being formed of a metal layer and being in contact with both sidewalls of the silicon pattern; c) removing the sacrificial pattern to expose the top surface of the silicon pattern; and d) forming a gate insulating layer and a gate electrode on the exposed silicon pattern.
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